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Sasken’s expertise in silicon design services and IC design services can transfer your product ideas into highly integrated ASIC and System on Chip (Soc) solutions at an optimum cost with a faster time-to-market. By choosing Sasken as a service partner, semiconductor companies and independent manufacturers can get access to experienced engineers thus saving valuable time and complementing existing team for the duration of the project.
RTL to GDS-II
- RTL to GDS-II design services include RTL development, Integration, linting, synthesis, formal verification, place, and route till GDS-II
- IC design services include RTL creation, functional verification, logic synthesis, formal analysis, floor-planning, place and route, DFT, timing closure, and GDS-II output
- Some of the business needs these offerings caters to are derivative SoC development, die reductions, timing closures, and system level verification
- Design service projects in this category are focused on the logical verification process of a SoC to create high coverage stimulus using a metric-driven verification methodology
- Executable verification plan, low-power verification, USB and PCIe integration verification. Also, Functional verification of cache coherent multiprotocol interconnect IP, Memory subsystem IP verification, Verify DDR3 PHY, DDR3 controller, RLD2/RLD3 PHY
- Augment verification team, Develop verification environment using Verilog, Augment verification team, Functional coverage
- o Some of the business needs these offerings cater to are Mobile platform development, OVM verification environment, AMS verification environment, and Metric-driven verification
- Design for Test (DFT) is a design service on the front-end of design where the goal is to reach a high fault coverage goal by using design techniques such as scan chains and built-in test (BIST). These services include scan insertion, ATPG, timing closure, vector generations, and simulations
- Some of the business needs these offerings cater to are cost savings, time-to-market, Memory testing with repair features, JTAG standards, 1149.1 and 1149.6, Analog IP testing and Full-chip scan
Analog to Mixed Signal Design and Verification
- Sasken enjoys over 200 man years of experience in the Analog domain with as many as 40+ Analog Blocks taped out and in production till date. Combining both digital and analog IP on a single device is another specialty service offered by Sasken.
- Some of the business needs these offerings cater to are High efficiency, Programmable, Wide temperature range, High ESD tolerance, Japanese CAN standards, AMS verification, and eRM environment.
FPGA Design and Development
- Sasken offers services in traditional FPGA flows as well as using its ASIC methodologies to enhance the overall quality of the FPGA based design
- End-to-end FPGA product development services include ASIC Prototyping on FPGA platform (Altera or Xilinx), RTL development, functional verification using native and 3rd party simulators, Synthesis of the design to target FPGA using native and 3rd party synthesizers, Place and route of design to target FPGA using native Place, and route tool (Xilinx ISE or Altera Quartus)
- Real time testing of the design on the board using test and measurement equipment likes logic analyser and oscilloscope
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