Silicon Verification and Validation

Silicon Verification and Validation

Ashwin Ramachandra

Ashwin Ramachandra

Subject Matter Expert

Sasken is one of the largest and customer recognized provider of IC Design R&D services since 1998 with over 2500+ man years of expertise in IC design services covering verification and pre/post validation. Sasken is a preferred partner for leading semiconductor companies and IDMs for services beyond IC design for end-to-end product design and implementation.

  • Silicon Verification
    • IP/System level verification
    • IP/SOC level verification using methodologies
      • eRM, VMM, OVM, UVM, SV, eRM, Specman, C, SystemC, Palladium, FPGA
    • IP, SoC environment development
    • IP verification – Validating the functionality of the IP using debug interfaces or other debugging tools like Trace32.
    • System Verilog/System C
    • C/C++ model integration
    • Code/functional coverage closure
    • Simulations
      • Gate level
      • Power aware
    • Assertion based verification

    Language expertise:

    SystemC, System Verilog, Verilog, VHDL

  • Silicon Validation
    • Pre-Silicon emulation and validation
    • Post Silicon validation
    • Board level silicon validation
    • Validation using hardware accelerators and emulators system
    • Hardware and software co-verification
    • SoC integration and validation
      • Integration and validation of developed IP using tools from Synopsys, Cadence, Mentor Graphics and others

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