- Smart Devices and Wearables
- Enterprise Grade Devices
Sasken’s expertise in silicon and IC design services can transfer your product ideas into a highly integrated ASIC and System on Chip (Soc) solution at an optimum cost with a faster time-to-market. By choosing Sasken as a service partner, semiconductor companies and independent manufacturers can get access to experienced engineers thus saving valuable time and complementing existing teams for the duration of the project.
- RTL services include RTL development, integration, linting, synthesis and formal verification.
- Some of the business needs this offering caters to are derivative SoC development, die reductions, timing closures, and system level verification.
- Design service projects in this category are focused on the logical verification of an IP or SoC by creating a high coverage stimulus using a metric-driven verification methodology.
- Examples of types of activities in this domain include the development of an executable verification plan for an Soc or IP, low-power verification of the chip, IP verification examples include - USB and PCIe integration verification, functional verification of a cache coherent multiprotocol IP, memory subsystem IP verification and high speed/ low speed PHY verification.
- The solutions that we verify cater to the communications, industrial, automotive and IoT verticals,
- Design for Test (DFT) is a design service on the front-end of design where the goal is to reach a high fault coverage goal by using design techniques such as scan chains and built-in self-test (BIST). These services include scan insertion, ATPG timing closure, vector generation and verification.
- DFT ensures that designs reach the market with low fault rates, enabling significant cost savings for the business.
Analog to Mixed Signal Design and Verification
- Sasken enjoys over 200 man years of experience in the Analog domain with as many as 40+ Analog Blocks taped out and in production till date.
FPGA Design and Development
- Sasken offers services in traditional FPGA flows as well as uses its ASIC methodologies to enhance the overall quality of the FPGA based design.
- End-to-end FPGA product development services include ASIC Prototyping on FPGA platforms (Altera or Xilinx). RTL development, functional verification using native and 3rd party simulators, Synthesis of the design to target FPGA using native and 3rd party synthesizers, Place and route of design to target FPGA using native Place and route tool (Xilinx ISE or Altera Quartus) are some of the typical design services.
- Sasken supports every step of the virtual prototyping process covering development, simulation, prototyping and performance analysis. This ultimately helps in decreasing the time- to- market, and enables software engineers to start development months before the hardware design is complete, enabling full system bring-up to occur within days of silicon availability.
- Expertise in SystemC, TLM2.0 methodology and tools from Synopsys, Cadence and others is required. Key highlights of our services include SystemC and Transaction level modelling, SoC integration and validation, IP verification, co-simulation, and architecture design exploration.
- Modern SoCs can have hundreds of IP blocks and Sasken helps find the right IP and VIP to meet your requirements, integrate the IP, and verify it in the context of the complete system
- Sasken offers Algorithm development, Reference models, HW-SW partitioning, Optimization & Micro-architecture development services.
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